The United States has deployed $820 billion in semiconductor capital expenditure since 2020, a figure that marks the largest peacetime industrial mobilization in the sector's history. The investment spans fabrication plants, advanced lithography systems, and supporting infrastructure across Arizona, Texas, Ohio, and New York. This is not cyclical spending. This is permanent capacity relocation.
The capital flow divides roughly into $340 billion in domestic fab construction—led by TSMC's Phoenix complex, Intel's Ohio and Arizona expansions, and Samsung's Taylor, Texas facility—and $480 billion in equipment purchases, predominantly ASML EUV lithography tools, Applied Materials deposition systems, and Lam Research etch chambers. The CHIPS and Science Act accounts for $52.7 billion in direct subsidies and $75 billion in tax credits through 2032, but private capital is carrying the majority. Corporate balance sheets and project finance are funding this buildout at a 6.4-to-1 ratio versus government money.
This matters because $820 billion establishes a cost floor for reversing the decision. No administration will mothball that infrastructure. No board will write off those assets. The US now possesses 23% of global leading-edge fab capacity, up from 11% in 2020, and the trajectory points to 31% by 2027 as Arizona and Ohio facilities reach volume production. Taiwan's share has contracted from 68% to 61% in the same window. The strategic implication: the US is pricing in permanent separation from cross-strait supply chains, regardless of diplomatic posture.
Second-order effects are appearing in equipment lead times and skilled labor markets. ASML's backlog now extends 34 months for High-NA EUV systems, up from 18 months in 2021. US-based process engineers with sub-3nm experience command $310,000 to $420,000 total compensation, a 47% premium over 2020 levels. Vocational programs in Arizona and Ohio are graduating 6,800 technicians annually, triple the 2019 output, yet fab operators report 11,000 open requisitions. The constraint is human capital, not financial capital.
Allocators should track three events in the next eight to fourteen months. First, TSMC's Arizona Fab 21 Phase 1 is scheduled for high-volume manufacturing ramp in Q2 2025, targeting 20,000 wafer starts per month by year-end—the test of whether US-based fabs can match Taiwanese yield curves. Second, Intel's Ohio Fab 52 site preparation concludes in Q3 2025, with first tool move-in expected in Q4; any delay signals subsidy disbursement friction or supply chain gaps. Third, the Treasury Department's final Section 48D advanced manufacturing tax credit guidance is due by July 2025, which will clarify the after-tax return on the $480 billion in equipment already deployed. Each milestone will either validate or challenge the $820 billion thesis.
The US semiconductor capital base now exceeds the combined 2020–2024 capital expenditures of South Korea, Japan, and the European Union. That is the geopolitical fact. The infrastructure is locked.
The takeaway
$820B in US semiconductor capex since 2020 establishes irreversible domestic capacity, with TSMC Arizona and Intel Ohio ramps in 2025 testing execution risk.
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