Tata Electronics, Murugappa Group's CG Power, and HCL Group have committed ₹1.29 trillion across semiconductor manufacturing projects announced since January 2025, signaling India's shift from design-only services to full-stack chip production. The three projects represent the first substantial capital deployment under the India Semiconductor Mission, which offers 50% fiscal support for fabrication plants and 30% support for assembly-test facilities.
Tata Electronics leads with two facilities: a ₹910 billion fabrication plant in Gujarat partnering with Taiwan's Powerchip Semiconductor Manufacturing Corporation, and an assembly-test facility in Assam valued at ₹270 billion. CG Power has committed to a ₹76 billion compound semiconductor fab focusing on gallium nitride and silicon carbide devices. HCL Group's project details remain under regulatory review, but industry filings suggest an assembly-test operation in Karnataka. The Gujarat fab targets 28-nanometer process technology with 50,000 wafer-per-month capacity by 2027, while the Assam facility aims for 48 million chip units annually by 2028.
The capital concentration matters because India currently holds 20% global share in chip design but zero in fabrication, creating supply-chain exposure that the 2021 automotive shortage made explicit. The government's incentive structure mirrors Taiwan's 1980s model: absorb early-stage capital risk while local groups build operational expertise. Tata's Gujarat facility will produce power management and display driver chips for automotive and consumer electronics, sectors where India already assembles 330 million smartphones and 24 million vehicles annually. The compound semiconductor focus from CG Power addresses electric vehicle power electronics and renewable energy inverters, markets growing at 18% CAGR domestically.
The timing aligns with geopolitical rebalancing of semiconductor supply. Vietnam, Malaysia, and India are absorbing assembly-test capacity as Western firms derisk from single-region dependence. India's advantage is its ₹850 billion annual semiconductor import bill and existing design workforce of 20,000 engineers at firms like Qualcomm, Intel, and AMD design centers. The risk is execution: building a 28-nanometer fab requires 700 process engineers and 2,400 technician-level staff, talent pools India must develop parallel to construction. Tata has announced partnerships with IIT Bombay and IISc Bangalore for training programs targeting 5,000 graduates by 2027.
Operators should track three milestones: equipment procurement announcements for Tata's Gujarat fab expected Q2 2025, which will indicate ASML and Tokyo Electron participation; workforce buildout velocity, measurable through quarterly hiring disclosures; and yield rates once pilot production begins in late 2027. The India Semiconductor Mission has ₹760 billion remaining in its incentive envelope, sufficient for two additional fabrication projects if these first three hit commissioning targets.
The ₹1.29 trillion figure represents contracted capital, not deployed spend. Actual construction outlays will peak in 2026-2027, creating demand for specialty construction services, cleanroom equipment, and industrial gas supply chains. Taiwan's PSMC partnership with Tata brings process transfer risk that won't clarify until first-silicon milestones in Q4 2027.
The takeaway
India's ₹1.29 trillion chip commitment shifts it from design services to fabrication, with first production targeted 2027-2028.
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